1. Field of the Invention
The present invention is directed to the design of application specific integrated circuits (ASICs). More specifically, but without limitation thereto, the present invention is directed to floorplanning and cell placement of an ASIC design.
2. Description of the Prior Art
In a typical chip architecture used for application specific integrated circuits, I/O cells are placed in an external I/O ring and in an internal I/O ring that surround the core area of the chip. The internal I/O ring lies approximately half way between the die solder bumps and the outer edge of the chip. During floorplanning and cell placement, some modules overlap the internal I/O ring.